Thesis Committee

Jason T. Stauth, Ph.D. (Chair)

Charles R. Sullivan, Ph.D.

Kofi M. Odame, Ph.D.

Abstract

In typical photovoltaic systems, PV cells are connected in series to achieve high output voltages, which decreases conduction losses and helps the inverter operate at higher efficiencies. A series connection means that the current through the string is limited by the worst case cell, substring, or module, which can result in suboptimal operation of the rest of the string. Given how even small shading can have an outsized effect there has been increasing interest in the use of distributed power management architectures to mitigate losses from variation in PV systems. In particular, partial power processing converters have gained traction as a means to improve the performance of PV arrays with small, distributed converters that configure in parallel with PV cells. These converters can use low voltage components, only process a fraction of the total power allowing them to achieve higher efficiencies and power density and also have higher reliability.

This work details the design and operation of a partial power processing converter implemented as a Resonant Switched Capacitor (ReSC) converter. An integrated circuit (IC) is designed in 0.18 µm CMOS process. Operation at high frequencies (20-50 MHz) allows high levels of integration with air core inductors directly attached to the die through a gold bump, solder reflow process. Test results for the IC are presented with power density and efficiency metrics. The IC is then used as a partial power processing converter to implement equalization with a specially constructed PV panel. The converter is shown to mitigate power loss due to mismatch.